Solid-state imaging devices are classified broadly into two categories: a charge transfer-type solid-state imaging element represented by a CCD sensor and an X-Y address-type solid-state imaging element represented by a CMOS sensor. In the following description, an explanation will be given on a CMOS sensor as the solid-state imaging device. In recent years, in order to establish both reduction in pixel size involved in increase in number of pixels and enhancement of sensitivity, CMOS sensors of a backside illumination type are becoming mainstream rapidly. Each pixel cell of a CMOS sensor is provided with a photoelectric conversion portion which generates a signal charge in response to incident light (hereafter, referred to as a pixel) and an amplification portion which converts the signal charge of the photoelectric conversion portion into a signal voltage and amplifies it.
For a structure of a CMOS sensor of the backside illumination type, after a wafer process of the CMOS sensor is completed, the wafer of the CMOS sensor is attached to a substrate supporting member, film thinning process is performed on the backside of the sensor, and a color filter is formed on the backside to complete the structure. An example of such structures and manufacturing methods are described in Patent Document 1.
In the CMOS sensor of the backside illumination type, the pixel portion performing photoelectric conversion is formed of a photodiode, and shielded with an impurity region of a conductivity type opposite to that of the photodiode, to suppress a dark time output due to an effect of a silicon interface. Therefore, electric potential of the photodiode cannot be controlled externally. Reading out of the charge accumulated by the photodiode is performed by changing electric potential below a transfer gate which is provided adjacent to the photodiode. Deterioration of image quality caused by reduction in an amount of the signal charge that can be accumulated by the photodiode in accordance with reduction of the pixel size has become a problem.
On the other hand, an image sensor of a stacked photodiode type, with a common name of Foveon sensor, is known (Patent Document 2). This sensor has a structure which generates and accumulates signal charges corresponding to wavelengths of incident light through photoelectric conversion by photodiodes disposed at different locations in the depth direction, and has independent read out paths for reading out independently the signal charges corresponding to the wavelengths of incident light. Since each cell has to be provided with an independent read out path, there is a problem that miniaturization of the cells is inhibited.
A structure of a stacked-type photodiode image sensor is shown in Patent Document 3 which is similarly configured as above and where three primary colors, i.e., R (red), G (green) and B (blue), are made to correspond to photodiodes at individual depth. With this structure, it is also necessary to form read out paths for reading out signal charges independently that correspond to wavelengths of incident light, so that there is similarly a problem of inhibiting miniaturization of the cells. Incidentally, Patent Document 3 was proposed by the present inventors.
In CCD sensors, a global shutter having synchronism is easy since CCD registers are provided to transfer signal charges, whereas, in CMOS sensor, a rolling shutter mode is necessitated in which pixel signals are read out sequentially, so that it is impossible to realize a global shutter. For this reason, there is a problem of a so-called rolling shutter distortion where an image is distorted with respect to a moving object. In order to prevent the rolling shutter distortion, it is necessary to add a primary accumulation region adjacently in a lateral direction, resulting in a problem of pixel size increase.
In fine pixels of recent years, a backside illumination-type solid-state imaging device (hereafter, explanations are given on a CMOS sensor of a backside illumination type) are frequently used. A backside illumination-type imaging device can condense incident light from the back side thereof onto a photodiode. In this structure, since there is no wiring layer on the back side, availability of light is enhanced through reduction of loss in incident light signal by making a distance from a micro lens to the photodiode short. In the backside illumination-type solid-state imaging device, a substrate supporting member is attached to a surface on the side of reading out of signal charges, where wiring is provided, and CMP (Chemical Mechanical Polishing) or etching is applied to the back side of the wafer, to reduce a thickness of the wafer, i.e., to achieve film thinning. Due to this film thinning, spectral sensitivity characteristics equivalent to those of a conventional front side illumination-type solid-state imaging device are obtained. For the photodiode of the backside illumination-type solid-state imaging device, a configuration is proposed in Patent Document 4 in which, in order to increase charge accumulation capacity, an accumulation gate is provided which has a MOS-type structure with a gate insulator film interposed on the surface of the photodiode on the side of reading out of signal charges. According to this structure, it is possible to increase charge accumulation capacity by the photodiode, however, it is not possible to accumulate a plurality of signal charges separately.